This invention relates to an information processor, such as microcomputer, which has a plurality of initial program loaders (IPL) each serving to start the corresponding one of different operation systems (OS's) after a central processing unit (CPU) has been reset or after a power supply has been turned "on".
Conventional microcomputers have only one type of IPL mode, and can start only one type of OS. In a case where it is desired to start any one of different OS's including, for example, a floppy disk, microdisk, digital cassette, etc. after resetting the OS or after turning "on" a power supply, an operator manipulates the microcomputer on those occasions.
In general, as shown in FIG. 1, a computer system has an arrangement of a microprocessor unit (MPU) in which a main memory 2, and an input/output interface (I/O IF) circuit 5 connected to peripheral equipment units 3 are inter-connected by buses 4 for addresses and data. The peripheral equipment 3 connected to the I/O IF 5 is, for example, a floppy disk (FD), or a microdisk (MD), etc. In such a computer system, each place of the peripheral equipment operates under a control peculiar thereto. After any peripheral equipment unit has been reset or after a power supply has been turned "on", the CPU 1 must execute an initial program loader (IPL) program for starting the peculiar control. In the prior art, such peculiar IPL records are stored in a lowerbit address area of the main memory 2 in individually divided IPL storage areas. The address space of the main memory 2 is illustrated in FIG. 2.
When the power supply has been turned "on", the CPU 1 loads an address FFFE of 16 bits as a memory address in a hardware fashion and fetches the corresponding memory content "FA". Subsequently, it increments a program counter to a count value corresponding to an address FFFF and thus fetches a corresponding memory contents "00". A signal "FA00" in a form in which the aforecited two information or contents are combined is put on the address bus so as to appoint the address FA00 of the main memory 2. Then, the operation of selecting the IPL record is started.
As shown in FIG. 2, a program for selecting any of the IPL records is stored at the address FA00. It is executed in order to select the predetermined IPL record. By way of example, in a case where contents IPL 2 stored in an address FC00 is to be fetched, this record IPL 2 is moved to an OS area which lies in the upper-bit address part of the main memory 2. Thus, the peripheral equipment 3 corresponding to the contents IPL 2 is initialized. With the prior art, accordingly, all the plurality of peculiar IPL programs have to be stored in the lower-bit part or ROM part of the main memory 2. The expedient of selecting the operation systems OS1, OS2 and OS3 by using the selecting program involves the disadvantage that the operating speed is low.
An alternative expedient is illustrated in FIG. 3. After an IPL program has been loaded, that is to say, after an initial program has been stored into a main memory, an operator sets through a console which of the OS's is to be used. Thus, the operation system, for example, OS1, OS2 or OS3 is selected with the program. In the presence of a plurality of IPL modes, accordingly, IPL programs which are equal in number to the modes must be stored in the ROM area of the main memory, in other words, in the form of ROM contents. Therefore, the area of the main memory which the user can utilize ("0".about."FA00") lessens to that extent.